The USB (Universal Serial Bus) is a peripheral bus specification developed by PC and telecom industry leaders. The USB brings the plug-and-play capability of computer peripherals outside the PC box. This eliminates the need to install cards into dedicated computer slots and reconfigure the system each time a peripheral is attached or detached from a PC. Personal computers equipped with USB allow computer peripherals to be automatically configured as soon as they are physically attached without the need to reboot or run setup. USB allows multiple devices--up to 127--to run simultaneously on a computer, with peripherals such as monitors and key boards acting as additional plug-in sites or hubs.
The USB is described in detail in the Universal Serial Bus Specification, Revision 1.0 published Jul. 15, 1996. The specification is jointly published by Compaq, Digital Equipment Corporation, IBM PC Company, Intel, Microsoft, NEC and Northern Telecom. The contents of this USB specification are incorporated herein by reference.
The USB bus topology may be described as follows. The USB connects USB devices with a USB host. There are two types of USB devices: the hub and the function. A hub is a device which provides additional attachment points for the USB. A function provides capabilities to the system, e.g., an ISDN connection, a digital joystick, a speaker, a keyboard, a mouse, etc. The hub and the function are described in greater detail below.
The USB physical interconnect is a tiered star topology. A hub is at the center of each star. Each wire segment is a point-to-point connection: (a) between the host and a hub, or (b) between a host and a function, or (c) between a hub and another hub or function.
FIG. 1 illustrates the topology of the USB system. The USB system 10 comprises a host 12. There are two points of attachment in the host 12: port 1 and port 2. The port 2 is connected by the wire segment 28 to the function 29. The port 1 is connected by the wire segment 18 to hub 1. The hub 1 has five ports 20. The function 22 is connected to one of these ports by the wire segment 24. Similarly, the hub 2 and hub 3 are also connected to ports of hub 1. Various functions (e.g., function 30, 32, etc.) are connected to ports on the hub 2 or the hub 3.
Hubs are a key element in the plug-and-play architecture of USB. Hubs serve to simplify USB connectivity from the user's perspective and provide robustness at low cost and complexity. Hubs are wiring concentrators and enable the multiple attachment characteristics of USB. Attachment points are referred to as ports (see FIG. 1). Each hub converts a single attachment point into multiple attachment points. The architecture supports concatenation of multiple hubs. The upstream port of a hub connects the hub towards the host. Each of the other downstream ports of a hub allows connection to another hub or function. Hubs can detect the attachment and detachment of a USB device at each downstream port and enable the distribution of power to these downstream USB devices. Each downstream port can be individually enabled and configured as either full or low speed. The hub isolates low speed ports from full speed signaling.
A function is a USB device that is able to transmit or receive data or control information over the USB. A function is typically implemented as a separate peripheral device with a cable that plugs into a port on a hub. However, a physical package may implement multiple functions and an embedded hub with a single USB cable. This is known as a compound device. A compound device appears to the host as a hub with one or more permanently attached USB devices. Examples of functions include a printer, a monitor, a mouse, a keyboard, a modem, an audio CD player, a tape player, an ISDN connection, etc.
There is only one host on any USB system. The USB interface to the host computer system is referred to as the host controller. The host controller may be implemented in a combination of hardware, firmware, or software. A root hub is integrated within the host system to provide one or more attachment points.
A device endpoint refers to a uniquely identifiable portion of a USB device (hub or function) that is a source or sink of information in a communication flow between host and USB device. An example of a USB function with more than one endpoint is a Data/Voice modem. There may be one endpoint for voice packets and one endpoint for data packets.
All bus transactions involve the transmission of up to three packets. Each transaction begins when the host controller, on a scheduled basis, sends a USB packet describing the type and direction of transaction, the USB device address, and endpoint number. This packet is referred to as the Token Packet. The USB device that is addressed by the Token Packet selects itself by decoding the appropriate address fields of the Token Packet. In a given transaction, data is transferred either from the host to a device or from a device to the host. The direction of data transfer is specified in the Token Packet. The source of the transaction then sends a data packet indicating whether the transfer was successful.
In general, most peripherals include I/O controllers which are designed to generate transactions for commonly used busses such as ISA, EISA, PCI, and the proprietary NU bus of Apple. It is desirable to adapt these peripherals for use with the highly advantageous USB. To accomplish this, it is desirable to provide a USB microcontroller which can generate familiar bus transactions such as ISA bus transactions from the USB serial protocol stream.
A block diagram of such a USB microcontroller unit is shown in FIG. 2. This microcontroller unit 50 comprises three blocks, a USB Serial Interface Engine (SIE) 60, Microcontroller Interface Unit 70, and a Memory Management Unit (MMU) 80. The SIE 60 connects to a port on a USB hub or on a USB host and serves as an interface to the USB protocol. Specifically, the SIE 60 formats data to be transmitted from the peripheral to the host in accordance with the USB protocol. It reformats data received from the USB host in accordance with the USB protocol into a form that can be buffered in the Memory Management Unit. The Microcontroller Interface Unit 70 interfaces with the I/O controller of the peripheral.
In conventional USB peripheral microcontrollers, the Memory Management Unit includes a plurality of FIFOs for buffering data packets, there being a dedicated FIFO for each USB endpoint.
Prior art USB microcontrollers are the 82930 Universal Serial Bus Microcontroller--available from Intel, USB Function Core--available from CAE, USB Device Controller Synthesizable Core--available from Sand Microelectronics and the CY7C63000/1 and CY7C36200/1 Cypress USB Controller.
A deficiency of these prior art USB microcontrollers is the memory management technique used within the Memory Management Unit. Typically, the MMU unit includes one FIFO buffer for packets received from the USB host and destined for the peripheral, and one FIFO buffer for each USB endpoint contained within the peripheral that can transmit packets to the USB host. All peripherals will have Endpoint 0 for control packets and Endpoint 1 for user packets. Many peripherals such as audio devices with multiple audio channels will have additional USB endpoints.
The use of a dedicated FIFO for packet from each USB endpoint and the use of a dedicated FIFO for packets from the host is very inefficient use of memory, especially as the FIFOs increase in size.
An improved memory management technique is disclosed in U.S. Pat. No. 5,313,586 and in U.S. Pat. No. 5,602,995, both of which are assigned to Standard Microsystems Corporation. These patents disclose a communication controller which is interfaced with a host processor and which includes a control unit for accessing a communication medium. Each data packet to be transmitted or received is assigned a packet number. Packet number assignment is carried out by a Memory Management Unit within the communication controller. The Memory Management Unit dynamically allocates to each assigned packet number one or more pages in a data packet buffer memory for the storage of the corresponding data packet. Upon issuing the assigned packet number, the physical addresses of the allocated pages of data packet buffer memory storage space are generated in a manner transparent to both the host processor and the control unit. Upon completion of each data packet loading operation, the corresponding packet number is stored in a packet number queue maintained for subsequent retrieval in order to generate the physical addresses at which the corresponding data packet has been stored. The contents of the above-identified U.S. patents are incorporated herein by reference.
In view of the foregoing, it is an object of the present invention to provide a USB microcontroller with an improved Memory Management Unit.
In particular, it is an object of the invention to provide a USB microcontroller with a Memory Management Unit that makes more efficient use of memory than the prior art.
More specifically, it is an object of the invention to provide a USB microcontroller dynamically allocates space in RAM to packets to be buffered instead of using a dedicated FIFO for each USB endpoint and a dedicated FIFO for the USB host.
A further disadvantage of the conventional USB microcontrollers is their data path which typically is arranged as follows:
USB.fwdarw.FIFO.fwdarw.MCU Interface Unit.fwdarw.Peripheral
Because of the use of FIFOs to buffer packets in the MMU, it is difficult, if not impossible, to have more than one master in the MCU Interface Unit access the FIFOs.
Accordingly, it is a further object of the invention to provide a USB peripheral microcontroller with an improved data path, in particular, a data path including a packet buffer which can be accessed by more than one master in an MCU Interface Unit.